1. Field of the Invention
The present invention relates to a PLL (Phase Locked Loop) frequency synthesizer.
2. Description of the Related Art
In order to generate a signal having a desired frequency, a PLL frequency synthesizer is used. Examples of such PLL frequency synthesizers include: an arrangement employing a PLL using a frequency divider; an arrangement including a frequency mixer instead of such a frequency divider; and an arrangement including both the frequency divider and the frequency mixer (see Patent document 1).
FIG. 1 is a block diagram which shows an example configuration of a PLL frequency synthesizer.
A VCO (voltage controlled oscillator) 20 oscillates at a frequency fVCO according to a control voltage VCNT. A local oscillator 24 generates a local signal SLO having a local frequency fLO. A mixer 22 performs frequency mixing of an output signal SVCO of the VCO 20 and the local signal SLO. The mixing operation of the mixer 22 generates a signal SSUM having a summation frequency fVCO+fLO and a signal SDIFF having a difference frequency fVCO−fLO. A filter 26 is configured as a low-pass filter, and extracts the difference frequency signal SDIFF thus mixed by the mixer 22.
A phase difference detection unit 12 makes a comparison between the phase of a reference frequency signal SREF having a reference frequency fREF output from a reference oscillator 10 and the phase of the difference frequency signal SDIFF, and generates a phase difference signal VPE that corresponds to the phase difference. Specifically, a phase comparator 14 generates an up/down signal UP/DN according to the phase relation between the reference frequency signal SREF and the difference frequency signal SDIFF. A charge pump circuit 16 charges or discharges a capacitor according to the up/down signal UP/DN, and outputs, as a phase difference signal VPE, a voltage that develops at the capacitor. A loop filter 18 performs filtering of the phase difference signal VPE, and outputs the resulting difference signal as the control voltage VCNT to be supplied to the VCO 20.
A PLL frequency synthesizer 1100 outputs the output signal SVCO of the VCO 20 via an output terminal OUT.